From 8c12b0494aa241bb6ddf3779a99d2f5d6ededf73 Mon Sep 17 00:00:00 2001
From: Florian Fischer <florian.fl.fischer@fau.de>
Date: Sat, 2 Feb 2019 14:45:21 +0100
Subject: rework build system #2: call make before executing any benchmark

Make scans the project directory for Makefiles and executes them.
The targets should be build by the new targets/Makefile.
All included Makefiles are now "quiet" by default.
---
 Makefile | 24 +++++-------------------
 1 file changed, 5 insertions(+), 19 deletions(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index bda8745..78aab1c 100644
--- a/Makefile
+++ b/Makefile
@@ -1,11 +1,4 @@
-.PHONY: all clean bench
-
-.DEFAULT_GOAL = all
-
-SRCDIR = src
-
-BENCHSRCDIR = $(SRCDIR)/benchmarks
-BENCHMARKS = $(shell dirname $(shell find $(BENCHSRCDIR) -name Makefile))
+MAKEFILES = $(shell dirname $(shell find . -name Makefile ! -path ./Makefile))
 
 OBJDIR = $(PWD)/build
 
@@ -23,18 +16,11 @@ CXXFLAGS = -std=c++11 $(CFLAGS) -fno-exceptions
 LDFLAGS = -pthread -static-libgcc
 LDXXFLAGS = $(LDFLAGS) -static-libstdc++
 
-GLIBC_NOTC = $(PWD)/../glibc/glibc-install-nofs/lib
-
-MAKEFILE_LIST = Makefile
-
-.PHONY: all clean $(SRCDIR) $(BENCHMARKS)
-all: $(OBJDIR)/ccinfo $(BENCHMARKS) $(SRCDIR)
-
-$(SRCDIR):
-	make -C $@ OBJDIR=$(OBJDIR)
+.PHONY: all clean $(MAKEFILES)
+all: $(OBJDIR)/ccinfo  $(MAKEFILES)
 
-$(BENCHMARKS): $(MAKEFILE_LIST)
-	$(MAKE) -C $@ all OBJDIR=$(OBJDIR)/$(shell basename $@)
+$(MAKEFILES):
+	$(MAKE) -C $@ OBJDIR=$(OBJDIR)/$(shell echo $@ | sed s/src//)
 
 $(OBJDIR)/ccinfo: | $(OBJDIR)
 	$(CC) -v 2> $@
-- 
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